Regviz

Alif Semiconductor /AE512F80F5582LS_CM55_HE_View /SDMMC /SDMMC_FORCE_ERROR_INT_STAT_R

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SDMMC_FORCE_ERROR_INT_STAT_R

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Alif Semiconductor/AE512F80F5582LS_CM55_HE_View/SDMMC/SDMMC_FORCE_ERROR_INT_STAT_R#0x0

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)FORCE_CMD_TOUT_ERR 0 (Val_0x0)FORCE_CMD_CRC_ERR 0 (Val_0x0)FORCE_CMD_END_BIT_ERR 0 (Val_0x0)FORCE_CMD_IDX_ERR 0 (Val_0x0)FORCE_DATA_TOUT_ERR 0 (Val_0x0)FORCE_DATA_CRC_ERR 0 (Val_0x0)FORCE_DATA_END_BIT_ERR 0 (Val_0x0)FORCE_CUR_LMT_ERR 0 (Val_0x0)FORCE_AUTO_CMD_ERR 0 (Val_0x0)FORCE_ADMA_ERR 0 (Val_0x0)FORCE_RESP_ERR 0 (Val_0x0)FORCE_BOOT_ACK_ERR

FORCE_CMD_IDX_ERR=Val_0x0, FORCE_DATA_END_BIT_ERR=Val_0x0, FORCE_CUR_LMT_ERR=Val_0x0, FORCE_BOOT_ACK_ERR=Val_0x0, FORCE_AUTO_CMD_ERR=Val_0x0, FORCE_CMD_TOUT_ERR=Val_0x0, FORCE_ADMA_ERR=Val_0x0, FORCE_RESP_ERR=Val_0x0, FORCE_CMD_END_BIT_ERR=Val_0x0, FORCE_CMD_CRC_ERR=Val_0x0, FORCE_DATA_TOUT_ERR=Val_0x0, FORCE_DATA_CRC_ERR=Val_0x0

Description

Force Event Register for Error Interrupt Status

Fields

FORCE_CMD_TOUT_ERR

Force Event for Command Timeout Error (SD and eMMC modes).

0 (Val_0x0): Not affected

1 (Val_0x1): Command Timeout Error Status is set
FORCE_CMD_CRC_ERR

Force Event for Command CRC Error (SD and eMMC modes).

0 (Val_0x0): Not affected

1 (Val_0x1): Command CRC Error Status is set
FORCE_CMD_END_BIT_ERR

Force Event for Command End Bit Error (SD and eMMC modes).

0 (Val_0x0): Not affected

1 (Val_0x1): Command End Bit Error Status is set
FORCE_CMD_IDX_ERR

Force Event for Command Index Error (SD or eMMC modes).

0 (Val_0x0): Not affected

1 (Val_0x1): Command Index Error Status is set
FORCE_DATA_TOUT_ERR

Force Event for Data Timeout Error (SD and eMMC modes).

0 (Val_0x0): Not affected

1 (Val_0x1): Data Timeout Error Status is set
FORCE_DATA_CRC_ERR

Force Event for Data CRC Error (SD and eMMC modes).

0 (Val_0x0): Not affected

1 (Val_0x1): Data CRC Error Status is set
FORCE_DATA_END_BIT_ERR

Force Event for Data End Bit Error (SD and eMMC modes).

0 (Val_0x0): Not affected

1 (Val_0x1): Data End Bit Error Status is set
FORCE_CUR_LMT_ERR

Force Event for Current Limit Error.

0 (Val_0x0): Not affected

1 (Val_0x1): Current Limit Error Status is set
FORCE_AUTO_CMD_ERR

Force Event for Auto CMD Error (SD and eMMC modes).

0 (Val_0x0): Not affected

1 (Val_0x1): Auto CMD Error Status is set
FORCE_ADMA_ERR

Force Event for ADMA Error.

0 (Val_0x0): Not affected

1 (Val_0x1): ADMA Error Status is set
FORCE_RESP_ERR

Force Event for Response Error (SD mode only).

0 (Val_0x0): Not affected

1 (Val_0x1): Response Error Status is set
FORCE_BOOT_ACK_ERR

Force Event for Boot ACK Error.

0 (Val_0x0): Not affected

1 (Val_0x1): Boot ACK Error Status is set

Links

()

Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data